Method of providing a frame clock for data signals in a communications network and switching device of the network

ABSTRACT

The method of providing a frame clock for data signals in a communications network includes determining phase positions (P1, P2, . . . ) of respective frame clock information (RT1, RT2, . . . ) of incoming data signals with respect to frame clock information (RTN) available at a switching point in at least one switching device (NK1, NK2, . . . ); storing in a memory device (SPN) in the at least one switching device (NK1, NK2, . . . ) values of all the determined phase positions; performing a phase control of the frame clock information (RTN) available at the switching point with respect to the frame clock information (RT1) of one incoming data signal; and when a loss of or interference with the frame clock information (RT1) with which a phase control was performed has occurred, performing a phase correction of the frame clock information (RT2) of another incoming data signal with the phase position of the frame clock information determined for the frame clock information (RT2) of the other incoming data signals prior to the loss or interference acting as a reference value. A switching device according to the invention is also provided for maintaining propogation delay stability, even in the case of loss or interference.

BACKGROUND OF THE INVENTION

The invention is based on a method of providing a frame clock for datasignals in a communications network.

Transmission channels with constant propagation delays are required, inparticular for feed lines of centralized multi-station control signalsor synchronized broadcasting. In connection with carrier frequencysystems and simple point-to-point connections, this requirement was, asa rule, met without additional effort by digital transmission systems.The user was able to set a desired total propagation delay by means ofadjustable phase setting members at the end of the transmission channel.In modern digital transmission systems with branching, cross-connectingor relaying capabilities, FIFOs are used, as a rule, at the digitalinputs in order to adapt all multiplex signals to a common, usuallyrandom, phase position. The propagation delays resulting from this donot have a constant value, in particular after a restart.

To obtain a constant propagation delay, it is possible to couple thephase positions of all outgoing multiplex signals to that of a selectedincoming signal. In a transmission system in accordance with thepamphlet "Gerate und Anlagen der Nachrichtentechnik 2 Industrielle Netzeder ANT Nachrichtentechnik, Seiten 6 und 7 insbesondere Flex Plex XMP1"Apparatus and Installations of Communications Technology 2, IndustrialNetworks of ANT Communications Technology, pages 6 and 7, in particularFlex Plex XMP1!, the frame identification word is employed as reference.

This solution is sufficient for line- or star-shaped networks. Howeverwith meshed network structures it is unsatisfactory, because netinterferences result in changes in propagation delay.

Meshed transmission networks with Flex Plex XMP1 offer an integratedcycle synchronization of the entire network which reacts flexibly tonetwork interferences and maintains the desirable synchronization in theentire network (or within partial networks if the entire networkdisintegrates because of interference). However, the solution forconstant propagation delay transmission known so far is not compatiblewith this because of the required locked fixing of the reference signal.

With phase-locked transmission a clock reference tree is manuallypreset. All desired nodes form a rigid partial network offering stablepropagation times between arbitrary points. The concept is notcompatible with replacement circuits.

Partial networks which are separated from the preset clock referencetree by interference have no defined cycle reference with the remainingnetwork, even if cycle synchronization were possible via 2 MBit/sconnections not contained in the clock reference tree. In particular,centralized multi-station control channels run through such connectionsare no longer stable in their propagation delay.

A bus system for a local operating system is known from DE 42 24 339 A1.The communication transmitted by a subscriber is sent to all subscribersvia a star coupler. A frame clock signal is generated by a frame clocksignal generator and sent to the star coupler, wherein the chronologicalsequence of the frame data of the frame clock in the star coupler definea reference frame clock. The further subscribers define an individualframe transmission cycle, taking into consideration the propagationdelay to the star coupler.

In German Patent DE 41 34 360 C1, different propagation delays inpartial networks are compensated by appropriate propagation delaycompensating units. In German Patent DE 42 07 675 C1, bus stations areequipped with frame generators and control devices, which take over thecentral cycle supply in case of loss or interference. This solution isalso phase-locked.

SUMMARY OF THE INVENTION

It is the object of the instant invention to provide a method forproviding a frame clock for data signals in which propagation delaystability continues to be maintained, in particular in case of loss orinterference.

It is another object of the present invention to provide a switchingdevice in a communication network by means of which propagation timestability can be maintained, even in the case of loss or interference.

This object is attained according to the invention by a method ofproviding a frame clock for data signals in a communications networkincluding the steps of:

a) determining phase positions (P1, P2, . . . ) of respective frameclock information (RT1, RT2, . . . ) of incoming data signals withrespect to frame clock information (RTN) available at a switching pointin at least one switching device (NK1, NK2, . . . ) of thecommunications network;

b) protectively storing in a memory device (SPN) in the at least oneswitching device (NK1, NK2, . . . ) values of all phase positions (P1,P2, P3) of the frame clock information (RT1, RT2, . . . ) determined instep a);

c) performing a phase control of the frame clock information (RTN)available at the switching point with respect to the frame clockinformation (RT1) of one incoming data signal;

d) determining if a loss of or interference of the frame clockinformation (RT1) with which the phase control of step b) was performedhas occurred; and

e) when the loss of or interference of frame clock information (RT1) hasoccurred, performing a phase correction with the phase position of theframe clock information (RT2) of a further incoming data signaldetermined prior to the loss or interference as a reference value.

In preferred embodiments of the method according to the invention thephase control includes averaging over several frame clock phases.Advantageously also a bit clock signal is derived from thephase-controlled frame clock signal.

The method describe hereinabove is particularly advantageous for datasignals in a meshed communications network comprising a plurality ofnetwork nodes for centralized multi-station control signals orsynchronized broadcasting.

A switching device for a communications network by means of whichpropagation delay stability can be maintained, even in case of loss orinterference, is also part of the present invention. The switchingdevice, advantageously consisting of a network node (NK1) of thecommunications network, comprises a frame clock signal generator, one orseveral phase measuring devices for respective determination of phasepositions of frame clock information of incoming data signals withrespect to the frame clock information from the frame clock signalgenerator, a phase control device for the adjustment of an output signalof the frame clock signal generator to the frame clock information ofone incoming data signal, a memory device for values of the respectivephase positions of the frame clock information of the incoming datasignals, said values being determined by the one or several phasemeasuring devices and a control device for switching the referencesignal for the phase control device to a different incoming data signalwhen a loss of or interference of frame clock information of the oneincoming data signal has occurred.

In a preferred embodiment of the switching device only a single phasemeasuring device is present but a selection switch is included forconnecting the single phase measuring device to respective connectionports at which the frame clock information is input. The control devicealso includes means for switching the switch for selection of thereference signal for the phase control device.

The present invention also includes a meshed communications networkcomprising a plurality of network nodes for centralized multi-stationcontrol signals or synchronized broadcasting, in which at least one ofthe network nodes consists of the switching device according to theinvention described hereinabove.

In the method or arrangement in accordance with the invention it ispossible to determine, in particular measure, the phase relationshipswith respect to a switching point--with branched and/or meshed networkswith respect to a network node--of all input points providing frameclock information. The phase of the frame clock signal intrinsic to theswitching point (system cycle) can be adjusted to the frame clockinformation of any arbitrary input point.

If the phase positions of the frame clock information of all incomingdata signals are stored, it is possible to fall back on these values incase of any arbitrary loss (even with replacement circuits), so that thephase relations within all partial networks can continue to be keptconstant.

Furthermore, the phase control in accordance with the invention can takeplace along the propagation direction of the bit clock signal. However,all resulting clock reference trees are permissible, not only apredetermined one.

In case of interferences in the network which lead to signal changes,only the phase value of the input point (port) for frame clockinformation from which the signal is now derived is used for phasecontrol. The control only needs to make a readjustment to the previouslystored value, all phase relations in the network are preserved by meansof this.

Since, without consideration of interference, it is no longer necessaryto guide the clock reference tree in the same way in which the datasignal, for example the centralized multi-station control signal, ispropagated, it is possible to operate several crossing centralizedmulti-station signals in the network without problems.

BRIEF DESCRIPTION OF THE DRAWINGS

Exemplary embodiments of the invention will be explained with the aid ofthe following drawing figures:

FIG. 1 is a diagram of a communications network with a network nodeaccording to the invention, and

FIG. 2 is a diagram of a meshed communications network with severalnetwork nodes.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows a simple communications network with a switching point(network node) NK1. For explanation of the principle, it is embodied inthe form of a star network with several data input points Port1, Port2,Port3. Multiplex signals reach the network node NK1 via the data linesDL1, DL2, DL3 and contain, besides use data--voice, centralizedmulti-station control signals, synchronized broadcasting, images, soundsignals--, also frame clock information RT1, RT2, RT3. On account ofdifferent line lengths and running times, the multiplex signals reachthe network node NK1 with different phase positions P1, P2, P3. Thesedifferent phase positions P1, P2, P3 of the frame clock information RT1,RT2, RT3 of incoming data signals are measured in a phase measuringdevice PMN in the network node NK1. The frame clock information RTN,which is intrinsic to the switching point/network node and is providedby a frame clock generator RGN, is used as the phase reference value forthe phase measurement. To measure the phase positions P1, P2, P3 of allincoming frame clock information RT1, RT2, RT3, either just as manyphase measuring devices are provided as there are incoming data linesor, as shown in FIG. 1, only one phase measuring device PMN is providedwhich can be connected via a selection switch UN with respectively oneof the data input points--PORT1, PORT2, PORT3--. A control device STN isprovided for controlling the selection switch UN, which can beactivated, for example via a phase control device PRN, for furtherswitching. All measured phase values are protectively stored in a memorySPN. Storage of the phase values is advantageously triggered by theuser. As a rule, it is necessary for the network to be in aninterference-free operating state for this.

During calibration, the phase position of all ports in respect to theframe clock information intrinsic to the network node is measured, forexample on the basis of a manually entered clock reference tree from apreferred clock reference tree, or simply from the actual state(possibly with lines previously already calibrated).

In place of the previous phase control with a fixed delay in respect toa fixed reference port, the system cycle intrinsic to the network nodeand supplied by the frame clock generator RGN can be adjusted to anyarbitrary frame clock information RT1, RT2, RT3 by means of the phasecontrol device PRN; i.e. it is possible to set any arbitrary delay toany arbitrary port.

During interference in the network which in particular leads to cyclereversals, the phase control is performed on the frame clock informationof a further incoming data signal, for example RT2, with the phaseposition of the frame clock information which had been determined forthis incoming data signal prior to the interference as a referencevalue. The control device STN which, in this case, makes the connectionto another port--Port 2--via the selection switch UN, also causes theappropriate phase value to be forwarded from the memory SPN to the phasecontrol device PRN. To detect such an interference state, a monitoringdevice U1, U2, U3, which is provided anyway in a communications networkfor other purposes, for example alarm signals, is associated with eachdata line DL1, DL2, DL3. If there is a frame clock information loss or ahigh proportion of bit errors, the entire signal on this data line, forexample DL1, is considered to be disturbed and an appropriate report issent to the control device STN, which triggers switching of theselection switch UN and the read-out of the former phase value P2required for phase control. The phase control merely needs to make areadjustment to the former phase value P2. All phase relations withinthe network are therefore preserved.

The phase control can suitably take place further along the propagationdirection of the bit clock signal, but all resulting clock referencetrees are permissible (for example reversal of the propagation directionin a meshed network), not only a preset one. Since it is no longernecessary to guide the clock reference tree in consideration ofinterference in the same way the centralized multi-station controlsignal is propagated, it is possible to operate several crossingcentralized multi-station signals in the network without problems.

As with interferences, in case of any arbitrary loss of a frame clockinformation (even with replacement circuits) it is possible to fall backon stored phase values, so that the phase relations within all partialnetworks can continue to be kept constant. FIG. 2 shows the principle ofa simple meshed network. If the frame clock information on the data lineDL1 is lost, it is possible to fall back to the frame clock informationof the data line DL2 which in turn receives its frame clock informationvia the data line DL4. In this case a reversal of the propagationdirection of the frame clock information (see arrow U) takes place onthe data line DL2. If necessary, its own phase setting device must beprovided for this replacement path because of the different propagationdelays. With line replacement circuits it is necessary to take care thatthe propagation delay difference between the two paths is still withinthe detection range of the phase measuring device. If this detectionrange is limited, for example to modulo 250 μs, the propagation delaydifference must not be greater than ±125 μs. Furthermore, withreplacement circuits the propagation delay difference which can becompensated for is limited by the storage depth of the FIFOs which matchthe incoming multiplex signals to a common phase position. In this casecare must be taken that the FIFOs are set to defined propagation delays.

It is advantageous for phase control to form a mean phase value overseveral frame clock signal phases, so that no errors caused by jittersoccur.

It is also advantageous to derive the bit clock signal for furtherprocessing of the data from the phase-controlled frame clock signal.

I claim:
 1. A method of providing a frame clock for data signals in acommunications network, said method comprising the steps of:a)determining phase positions (P1, P2, . . . ) of respective frame clockinformation (RT1, RT2, . . . ) of incoming data signals with respect toframe clock information (RTN) available at a switching point in at leastone switching device (NK1, NK2, . . . ) of the communications network;b) protectively storing in a memory device (SPN) in said at least oneswitching device (NK1, NK2, . . . ) values of all of said phasepositions (P1, P2, P3) of the frame clock information (RT1, RT2, . . . )determined in step a); c) performing a phase control of said frame clockinformation (RTN) available at said switching point with respect to saidframe clock information (RT1) of one of said incoming data signals; d)determining if a loss of or interference of said frame clock information(RT1) with which the phase control of step c) was performed has occurredby a monitoring means (U1, U2, U3); and e) when said loss of or saidinterference of said frame clock information (RT1) has occurred,performing a phase correction with a reference value consisting of thephase position of said frame clock information (RT2) of a further one ofsaid incoming data signals determined in step a); said phase position ofsaid frame clock information (RT2) of said further one of said incomingsignals being determined prior to occurrence of said loss or saidinterference.
 2. The method as defined in claim 1, wherein saidperforming said phase control comprises averaging over several frameclock phases.
 3. The method as defined in claim 1, further comprisingderiving a bit clock signal from a phase-controlled frame clock signal.4. A switching device for a communications network, said switchingdevice comprising:a frame clock signal generator (RGN), one or severalphase measuring devices (PMN) for respective determination of respectivephase positions (P1, P2, . . . ) of frame clock information (RT1, RT2, .. . ) of incoming data signals with respect to frame clock information(RTN) from said frame clock signal generator (RGN), a phase controldevice (PRN) for the adjustment of an output signal of the frame clocksignal generator (RGN) with the frame clock information (RT1, RT2, . . .) of a selected one of the incoming data signals acting as a referencesignal, a memory device (SPN) for values of the respective phasepositions (P1, P2, . . . ) of the frame clock information (RT1, RT2, . .. ) of said incoming data signals, said values being determined by saidone or several phase measuring devices (PMN), and a control device (STN)for switching said reference signal for adjustment of the output signalof the frame clock signal generator to a different one of said incomingdata signals when a loss of or interference of said frame clockinformation of said one of said incoming data signals has occurred. 5.The switching device as defined in claim 4, further comprising means(U1, U2, U3) for monitoring to determine when a loss of or interferenceof said frame clock information of each of said incoming data signalshas occurred.
 6. The switching device as defined in claim 5, having onlyone of said phase measuring devices (PMN) and further comprising aselection switch (UN) for connecting said phase measuring device (PMN)to respective connection points (PORT1, PORT2, . . . ) at which saidframe clock information (RT1, RT2, . . . ) of said incoming data signalsis input, said control device (STN) also including means for switchingsaid switch (UN) for selection of said reference signal for said phasecontrol device.
 7. The switching device as defined in claim 4 andconsisting of a network node (NK1) of the communications network.
 8. Ameshed communications network comprising a plurality of network nodesfor centralized multi-station control signals or synchronizedbroadcasting, wherein at least one of said network nodes comprises:aframe clock signal generator (RGN), one or several phase measuringdevices (PMN) for respective determination of phase positions (P1, P2, .. . ) of frame clock information (RT1, RT2, . . . ) of incoming datasignals with respect to the frame clock information (RTN) from the frameclock signal generator (RGN), a phase control device (PRN) for theadjustment of an output signal of the frame clock signal generator (RGN)to the frame clock information (RT1, RT2, . . . ) of one of saidincoming data signals, a memory device (SPN) for values of therespective phase positions (P1, P2, . . . ) of the frame clockinformation (RT1, RT2, . . . ) of said incoming data signals, saidvalues being determined by the one or several phase measuring devices,and a control device for switching said reference signal for adjustmentof the output signal of the frame clock signal generator to a differentone of said incoming data signals when a loss of or interference of saidframe clock information of said one of said incoming data signals hasoccurred.
 9. A method of providing a frame clock for data signals in ameshed communications network comprising a plurality of network nodesfor centralized multi-station control signals or synchronizedbroadcasting, said method comprising the steps of:a) determining phasepositions (P1, P2, . . . ) of respective frame clock information (RT1,RT2, . . . ) of incoming data signals with respect to frame clockinformation (RTN) available at a switching point in at least oneswitching device (NK1, NK2, . . . ) of the communications network; b)protectively storing in a memory device (SPN) in said at least oneswitching device (NK1, NK2, . . . ) values of all of said phasepositions (P1, P2, P3) of the frame clock information (RT1, RT2, . . . )determined in step a); c) performing a phase control of said frame clockinformation (RTN) available at said switching point with respect to saidframe clock information (RT1) of one of said incoming data signals; d)determining if a loss of or interference of said frame clock information(RT1) with which the phase control of step c) was performed has occurredby a monitoring means (U1, U2, U3 ); e) when said loss of orinterference of said frame clock information (RT1) has occurred,performing a phase correction of the frame clock information (RT2) of afurther one of said incoming data signals with the phase position ofsaid frame clock information (RT2) of said further one of said incomingdata signals determined prior to said loss or interference as areference value.